In semiconductor applications, a delay calibration of circuitry on a semiconductor package can offset process, voltage, and temperature (PVT) variations. Present calibration methods include off-chip components as well as external pins on the packages under calibration. In order to carry out a calibration process, some form of comparison is generally performed. For example, when an off-chip component is used for calibration, the off-chip component is usually used as a reference for comparison with on-chip components.
Because of continued rapid scaling of complementary metal oxide semiconductor (CMOS) technology, the use of off-chip components is becoming more expensive. Thus, off-chip components should be limited to applications relying on high accuracy of delay calibration.